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1. A pure semiconductor (no impurities) is called:
Explanation: Intrinsic semiconductor: pure material like Si or Ge. At room temperature, thermal energy breaks some covalent bonds β equal numbers of free electrons and holes. Extrinsic semiconductors are doped with impurities to alter carrier concentrations.
2. Adding pentavalent (Group-V) impurity like phosphorus or arsenic to silicon produces:
Explanation: Pentavalent atoms have 5 valence electrons β 4 form covalent bonds with Si, the 5th is a free electron. These extra electrons are majority carriers β n-type (negative carriers majority).
3. Adding trivalent (Group-III) impurity like boron or aluminium to silicon produces:
Explanation: Trivalent atoms have 3 valence electrons β all 3 form covalent bonds but one bond is incomplete β hole created. Holes are the majority carriers β p-type (positive carriers majority).
4. Majority carriers in n-type and p-type semiconductors are respectively:
Explanation: n-type: majority = electrons, minority = holes. p-type: majority = holes, minority = electrons. The doping creates an excess of one type; the product nΓp = nα΅’Β² (mass action law) remains constant.
5. In a conductor at room temperature, the energy band structure shows:
Explanation: Conductors (metals) have either overlapping bands (e.g., Na, K) or a partially filled conduction band (e.g., Cu) β electrons can move freely at the Fermi level β high conductivity.
6. The difference between an insulator and a semiconductor is primarily:
Explanation: Si: Eg β 1.1 eV; Ge: Eg β 0.67 eV. Diamond (insulator): Eg β 5.5 eV. Thermal energy at room temperature (~0.026 eV) can bridge a small gap but not a large one.
7. A hole in a semiconductor is:
Explanation: When an electron leaves the valence band, it leaves a hole β an electron vacancy. Adjacent electrons can move into the hole, making the hole appear to move in the opposite direction. Holes have an effective positive charge of +e.
8. The mass action law for a semiconductor states that:
Explanation: Mass action law: np = nα΅’Β² regardless of doping. For intrinsic semiconductor: n = p = nα΅’. For n-type: n β Nd >> nα΅’, so p = nα΅’Β²/Nd
9. When temperature increases, the conductivity of a pure semiconductor:
Explanation: Higher temperature β more thermal energy β more covalent bond breakings β more electron-hole pairs β more carriers β lower resistance. This negative temperature coefficient (NTC) distinguishes semiconductors from metals (PTC).
10. Donor energy levels are located:
Explanation: Donor levels from pentavalent impurities sit very close to the conduction band (Ei_donor β 0.01β0.05 eV below CB in Si). Room temperature thermal energy easily ionises them β free electrons in the CB. Acceptor levels from trivalent impurities sit just above the valence band.
11. In an n-type semiconductor, the Fermi level is:
Explanation: The Fermi level indicates the energy where P(occupancy) = 0.5. In n-type: excess electrons β higher occupancy near CB β Fermi level shifts toward the conduction band.
12. Drift current in a semiconductor is caused by:
Explanation: Drift current = nqv_d, where v_d is drift velocity due to the applied electric field E. Diffusion current is driven by the concentration gradient (carriers move from high to low concentration). In a p-n junction at equilibrium, drift and diffusion currents balance.
13. At 0 K, a pure semiconductor:
Explanation: At 0 K, no thermal energy β no electrons excited across the gap β fully filled valence band, completely empty conduction band β exactly zero conductivity (perfect insulator behaviour). Above 0 K, thermal excitation creates electron-hole pairs.
14. Silicon is preferred over germanium for semiconductor devices at high temperatures because:
Explanation: At high temperatures, thermally generated carriers overwhelm the doped carriers in Ge (Eg = 0.67 eV) first. Si (Eg = 1.1 eV) is stable to higher temperatures. Additionally, Si has higher melting point and lower leakage current.
15. Carrier mobility ΞΌ is defined as:
Explanation: ΞΌ = v_d/E (mΒ²/(VΒ·s)). Conductivity Ο = n_e q ΞΌ_e + n_h q ΞΌ_h. For Si: ΞΌ_e β 0.14 mΒ²/Vs, ΞΌ_h β 0.05 mΒ²/Vs. Electrons have higher mobility than holes in most semiconductors.
16. In a p-n junction with no external bias, the net current is zero because:
Explanation: Diffusion of majority carriers across the junction builds a potential barrier (contact potential). The barrier creates a drift current (minority carriers swept by built-in field) that exactly opposes the diffusion current β equilibrium with zero net current.
17. The depletion region in an unbiased p-n junction contains:
Explanation: Near the junction, electrons from n-side and holes from p-side recombine β carriers are depleted β only fixed positive donor ions (n-side) and negative acceptor ions (p-side) remain β the depletion/space charge region. This region has a built-in electric field directed from n to p.
18. Forward biasing a p-n junction means:
Explanation: Forward bias: p-side to +V, n-side to 0V. Applied field opposes the built-in field β depletion width decreases β barrier lowers β majority carriers flow across β large current. Threshold: ~0.3 V for Ge, ~0.7 V for Si.
19. In reverse bias, diode current is:
Explanation: Reverse bias widens the depletion layer and increases the barrier β majority carriers cannot cross β only minority carriers (small number) flow as reverse saturation current Iβ (typically ΞΌA range for Si diodes).
20. The ideal diode current equation is:
Explanation: Shockley diode equation: I = Iβ(e^(qV/kT) β 1) where V_T = kT/q β 26 mV at room temperature. Forward bias V > 0 β exponential current growth. Reverse bias V
21. Zener diode is operated in:
Explanation: Zener diode is specially designed to operate in reverse breakdown at a precise voltage (Zener voltage V_Z). It maintains nearly constant voltage across itself despite varying current β used as voltage regulator.
22. A half-wave rectifier uses:
Explanation: Half-wave: 1 diode passes either positive or negative half of AC cycle. Output is pulsating DC at supply frequency. Efficiency = 40.6%. Full-wave uses 2 (centre-tap) or 4 diodes (bridge) and rectifies both halves β higher efficiency (81.2%).
23. In a bridge rectifier, during the positive half cycle, which diodes conduct?
Explanation: In a bridge (Dβ, Dβ, Dβ, Dβ): during positive half cycle, Dβ and Dβ conduct (one diagonal); during negative half cycle, Dβ and Dβ conduct (other diagonal). Both half cycles produce current through the load in the same direction.
24. LED emits light when:
Explanation: In forward-biased LEDs, electrons from n-side and holes from p-side recombine at the junction. The energy released = Eg (band gap) is emitted as a photon: E = hf = Eg. Colour of light depends on the semiconductor material (GaAs: IR; GaAsP: red; GaN: blue).
25. A solar cell works on the principle of:
Explanation: Incident photons of energy hf > Eg create electron-hole pairs. The built-in field at the p-n junction sweeps electrons to n-side and holes to p-side β EMF is generated β current flows in external circuit. Open-circuit voltage β 0.5β0.7 V per cell for Si.
26. A photodiode is operated in:
Explanation: In reverse bias: the large depletion region allows more photon absorption. Incident light creates electron-hole pairs that are swept by the field β reverse current increases proportionally with light intensity. Used in optical communication receivers, CDs, remote controls.
27. In a Zener voltage regulator circuit, the Zener diode is connected:
Explanation: Zener in parallel with load, reverse biased. As long as input voltage exceeds V_Z, Zener maintains constant V_Z across the load. A series resistor R_s drops the excess voltage. Current through Zener adjusts to maintain constant output.
28. The forward voltage drop across a silicon diode at which it starts conducting significantly is approximately:
Explanation: Silicon diode knee voltage β 0.7 V (Ge β 0.3 V). Below this, very little current flows (exponential with low V_T). Above 0.7 V, current increases exponentially β the diode is 'ON'. In circuit analysis, silicon diode is often modelled as a 0.7 V battery in series with ideal diode.
29. Avalanche breakdown in a reverse-biased diode occurs due to:
Explanation: At high reverse voltage, thermally generated minority carriers gain enough energy to ionise silicon atoms β more electron-hole pairs β these also ionise β avalanche multiplication β current rises sharply. Zener breakdown (~β€5 V) is quantum tunneling; avalanche (>5 V) is impact ionisation.
30. Tunnel diode exhibits negative resistance because:
Explanation: Heavily doped tunnel diode: at low forward voltage, quantum tunneling from n to p gives high current. As V increases, the tunneling path shifts out of alignment β current decreases (negative resistance region) before normal forward current takes over at higher V.
31. The junction capacitance of a reverse-biased p-n junction:
Explanation: C β 1/W where W = depletion width. Reverse bias increases W β C decreases. Varactor (varicap) diodes exploit this voltage-dependent capacitance for frequency tuning in oscillators and filters.
32. Built-in potential (contact potential) in a p-n junction is approximately:
Explanation: The built-in potential Vβ arises from the ionised donor/acceptor charges in the depletion region. Vβ β 0.3 V for Ge, β 0.7 V for Si. This is the height of the potential barrier that majority carriers must overcome in forward bias.
33. A bipolar junction transistor (BJT) consists of:
Explanation: BJT: n-p-n (emitter-base-collector) or p-n-p. Three regions: emitter (heavily doped), base (thin, lightly doped), collector (moderately doped). The two junctions are emitter-base and base-collector.
34. For an n-p-n transistor in the active region:
Explanation: Active mode: EB forward biased (electrons injected into thin base) + BC reverse biased (high field sweeps carriers to collector). Most injected electrons cross the base and are collected β I_C β I_E >> I_B.
35. Current gain Ξ² (hFE) of a BJT in common emitter configuration is:
Explanation: Ξ² = I_C/I_B. Typical values: 50β300. A small base current controls a much larger collector current β transistor amplifies current. Related to Ξ± (common-base gain): Ξ² = Ξ±/(1βΞ±), where Ξ± = I_C/I_E.
36. A BJT acts as a closed switch (saturated) when:
Explanation: Saturation: both EB and CB junctions are forward biased β maximum collector current for given V_CC β V_CE,sat β 0.1β0.2 V β transistor acts as closed switch. Cutoff: I_B = 0, both junctions reverse biased β I_C β 0 β open switch.
37. In a common-emitter amplifier, the output voltage is:
Explanation: In CE configuration: increasing V_in β increasing I_B β increasing I_C β increasing V_CE drop across R_C β decreasing output V_CE. So output decreases when input increases β 180Β° phase inversion.
38. If Ξ± = 0.98, then Ξ² is:
Explanation: Ξ² = Ξ±/(1βΞ±) = 0.98/(1β0.98) = 0.98/0.02 = 49.
39. Field effect transistors (FETs) are voltage-controlled devices because:
Explanation: In a MOSFET or JFET, the gate controls current via an electric field effect with essentially zero gate current (very high input impedance). BJTs are current-controlled (base current controls collector current). FETs have much higher input impedance β preferred in amplifiers and logic circuits.
40. Which BJT configuration provides both current gain and voltage gain?
Explanation: CE: voltage gain Av > 1, current gain Ξ² > 1, power gain = Av Γ AI (highest). CB: voltage gain > 1 but current gain (Ξ±) 1 but voltage gain
41. The DC load line in a transistor circuit connects:
Explanation: From V_CC = I_C Γ R_C + V_CE: when I_C = 0, V_CE = V_CC (cutoff); when V_CE = 0, I_C = V_CC/R_C (saturation). The load line connects these two points on the I_CβV_CE characteristic. The Q-point (operating point) is where the load line intersects the base current curve.
42. In an n-channel MOSFET (NMOS), current flows in the channel when:
Explanation: NMOS (enhancement mode): applying positive V_GS > V_th inverts the p-type substrate under the gate, creating an n-channel through which electrons flow from source to drain. Below V_th: channel is absent β off. Enhancement mode devices are OFF by default and turned ON by applying V_GS > V_th.
43. The purpose of DC biasing a transistor amplifier is to:
Explanation: Without DC bias, only positive or negative signal half-cycles would be amplified (clipping). Proper bias (voltage divider, self-bias) sets the Q-point in the middle of the load line so both positive and negative signal swings are amplified without clipping.
44. AND gate output is 1 (HIGH) only when:
Explanation: AND: Y = AΒ·B. Truth table: 00β0, 01β0, 10β0, 11β1. Output HIGH only when ALL inputs are HIGH. Represents logical multiplication.
45. OR gate output is 0 (LOW) only when:
Explanation: OR: Y = A+B. Truth table: 00β0, 01β1, 10β1, 11β1. Output LOW only when ALL inputs are LOW. Represents logical addition.
46. NOT gate is also called an inverter because:
Explanation: NOT: Y = Δ. Input 0 β output 1; input 1 β output 0. The inverter has one input and one output. Used in all digital circuits for complementation.
47. NAND gate is called a universal gate because:
Explanation: NAND (and NOR) gates can implement NOT, AND, OR, and any combination β they are functionally complete β any digital circuit can be built using only NANDs (or only NORs). This simplifies manufacturing.
48. NAND gate output is 0 only when:
Explanation: NAND: Y = (AB)Μ = NOT(A AND B). Output 0 only when AND output is 1 β i.e., when all inputs are 1. Truth table: 00β1, 01β1, 10β1, 11β0.
49. XOR (exclusive OR) gate output is 1 when:
Explanation: XOR: Y = AβB = ABΜ + ΔB. Truth table: 00β0, 01β1, 10β1, 11β0. Output HIGH when inputs differ. Used in binary adders (sum bit) and comparators.
50. De Morgan's first theorem states:
Explanation: First: complement of OR = AND of complements: NOT(A OR B) = (NOT A) AND (NOT B). A NOR gate equals NAND with inverted inputs. Both De Morgan theorems help simplify and transform logic expressions.
51. De Morgan's second theorem states:
Explanation: Second: complement of AND = OR of complements: NOT(A AND B) = (NOT A) OR (NOT B). A NAND gate equals NOR with inverted inputs. Used to convert between NAND/NOR implementations.
52. A two-input NAND gate can be used as a NOT gate by:
Explanation: NAND with both inputs tied to A: Y = (AΒ·A)Μ = Δ. This creates a NOT gate using only a NAND gate, demonstrating universality. Similarly, NOR with both inputs tied: Y = (A+A)Μ = Δ.
53. A half adder circuit produces:
Explanation: Half adder: Sum = A β B (XOR), Carry = AΒ·B (AND). Cannot handle carry input from previous stage β used only for the least significant bit. Full adder adds a carry-in bit.
54. To implement a NOT gate using NOR gates, one would:
Explanation: NOR with both inputs tied to A: Y = (A+A)Μ = Δ. Like NAND, NOR is a universal gate. Any digital function can be built using only NOR gates.
55. Simplify: Y = AB + ABΜ
Explanation: Y = AB + ABΜ = A(B + BΜ) = AΒ·1 = A. This is the Boolean absorption/factoring identity. Useful in reducing the complexity of logic circuits.
56. In a BJT common-emitter circuit: V_CC = 10 V, R_C = 2 kΞ©, Ξ² = 100. If I_B = 40 ΞΌA, find I_C and V_CE.
Explanation: I_C = Ξ² Γ I_B = 100 Γ 40Γ10β»βΆ = 4 mA. V_CE = V_CC β I_C Γ R_C = 10 β 4Γ10β»Β³ Γ 2Γ10Β³ = 10 β 8 = 2 V. The transistor is in active mode (V_CE > V_CE,sat).
57. A Zener regulator has V_in = 12 V, V_Z = 6 V, R_s = 300 Ξ©, R_L = 600 Ξ©. Current through Zener I_Z is:
Explanation: I_total = (V_in β V_Z)/R_s = (12β6)/300 = 6/300 = 20 mA. I_L = V_Z/R_L = 6/600 = 10 mA. I_Z = I_total β I_L = 20 β 10 = 10 mA.
58. A BJT with Ξ² = 200 has I_B = 60 ΞΌA and V_CC = 9 V, R_C = 1 kΞ©. Is it in saturation?
Explanation: Active I_C = Ξ²ΓI_B = 200Γ60ΞΌA = 12 mA. Maximum possible: I_C,sat = V_CC/R_C = 9/1000 = 9 mA. Actual I_B required for saturation: I_B,sat = I_C,sat/Ξ² = 9mA/200 = 45 ΞΌA I_B,sat β transistor is saturated. V_CE,sat β 0.2 V.
59. CMOS inverter uses:
Explanation: CMOS (Complementary MOS): PMOS connects V_DD to output, NMOS connects output to GND. Input HIGH: NMOS on, PMOS off β output LOW. Input LOW: NMOS off, PMOS on β output HIGH. Near-zero static power consumption because in steady state one transistor is always off.
60. The reverse saturation current Iβ of a p-n junction doubles approximately for every:
Explanation: Iβ depends on minority carrier concentration which depends exponentially on temperature. Rule of thumb: Iβ approximately doubles for every 10Β°C rise in temperature. This leads to thermal runaway in BJT circuits if not properly stabilised.
61. Ripple factor (ratio of AC to DC component) is smaller for:
Explanation: Ripple factor = rms of AC component / DC component. Half-wave: r = 1.21. Full-wave: r = 0.482. Full-wave has lower ripple because it rectifies both half cycles β pulsation is at 2Γ supply frequency β easier to filter.
62. The sign of the Hall coefficient R_H distinguishes:
Explanation: R_H = E_H/(JΓB) = 1/(nq) for n-type β negative (conventional sign with electrons). For p-type with holes: R_H = +1/(pq) β positive. The sign of R_H directly tells you the dominant carrier type, and its magnitude gives carrier density n or p.
63. VLSI (Very Large Scale Integration) typically integrates:
Explanation: SSI (Small Scale): 10 million transistors. Modern CPUs have billions of transistors. The progression is driven by Moore's Law (transistor density doubles ~every 2 years).
64. Germanium has band gap Eg = 0.67 eV. At room temperature, compared to silicon (Eg = 1.1 eV), germanium has:
Explanation: nα΅’ β exp(βEg/2kT). Smaller Eg β larger exponent β higher nα΅’. Ge has more intrinsic carriers than Si at the same temperature β higher conductivity β lower breakdown voltage β less suitable for high-temperature operation.
65. In a circuit with ideal diodes, a diode is forward biased (acts as short circuit) when:
Explanation: Anode (+) at higher V than cathode (β) β forward bias β diode conducts (ideal: zero forward voltage drop). Reverse: anode
66. NOR gate output for inputs A=1, B=0 is:
Explanation: NOR: Y = (A+B)Μ. For A=1, B=0: A+B = 1+0 = 1. Y = 1Μ = 0. NOR output is 1 only when both inputs are 0.
67. A transistor has I_E = 2 mA and I_B = 20 ΞΌA. Ξ² is:
Explanation: I_C = I_E β I_B = 2 mA β 0.02 mA = 1.98 mA. Ξ² = I_C/I_B = 1.98/0.02 = 99.
68. A positive clipper circuit clips the positive half of an input AC signal by:
Explanation: Positive clipper: diode in parallel with load, anode grounded. When V_in goes positive, diode conducts β output β V_forward β 0.7 V (Si). Negative half cycle passes unchanged. Used in signal processing to remove one polarity of a waveform.
69. XNOR (Exclusive NOR) gate output is 1 when:
Explanation: XNOR: Y = (AβB)Μ = ΔΒ·BΜ + AΒ·B. Truth table: 00β1, 01β0, 10β0, 11β1. Output HIGH when both inputs are same. Used as equality detector in comparators.
70. Which device is used for generating light in fiber optic communication?
Explanation: LEDs and laser diodes convert electrical energy to light (electroluminescence). In fiber optics: laser diodes are used for long-distance (coherent, narrow linewidth); LEDs for shorter distances. The light is coupled into the optical fiber for data transmission.
71. Advantages of digital circuits over analogue include:
Explanation: Digital signals (0/1) are robust against noise because a wide margin exists between logic levels. Analogue signals degrade with every amplification stage. Digital systems are also easy to store, copy, process, and program β making them preferable for computation and communication.
72. Which BJT configuration has the lowest input impedance?
Explanation: CB configuration: input at emitter, output at collector. Input impedance β r_e = V_T/I_E β 26mV/I_E β very low (tens of ohms). CE has moderate Zin (~1 kΞ©); CC (emitter follower) has high Zin (~Ξ² Γ R_E). Low Zin of CB makes it useful for matching to low-impedance sources (antennae, RF amplifiers).
73. What logic function does the circuit produce if an AND gate feeds into a NOT gate?
Explanation: AND followed by NOT = NAND: Y = (AΒ·B)Μ. This is the definition of a NAND gate. Similarly, OR followed by NOT = NOR gate.